Did IBM Just Preview The Future of Caches?
At Hot Chips last week, IBM announced its new mainframe Z processor. It’s a big interesting piece of kit that I want to do a wider piece on at some point, but there was one feature of that core design that I want to pluck out and focus on specifically. IBM Z is known for having big L3 caches, backed with a separate global L4 cache chip that operates as a cache between multiple sockets of processor
Apple Exploring RISC-V, Hiring RISC-V 'High Performance' Programmers
Apple is in the process of switching its PCs to Arm-based SoCs, but the company might not be putting all its eggs into one basket, as it is also exploring the emerging open-source RISC-V architecture. This week the company posted a job alert for RISC-V high-performance programmer(s). Apple is currently looking for experienced programmers with detailed knowledge of the RISC-V Instruction Set Archit
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