POP11 is a PDP11 compatible processor fit into an FPGA. Design language is SFL and we converted SFL to Verilog with sfl2vl. We have two version of POP11. POP11/40 This processor is PDP11/40 compatible with MMU and EIS as well as serial I/O, IDE hard drive interface and timer. It can boot UNIX from IDE HDD. It uses about 3000 logic cells with Altera FPGA. We are currently use Cyclone EP1C3 or FLEX