HPC-oriented Latency Numbers Every Programmer Should Knowlatency.txt �� o%V Latency Comparison Numbers -------------------------- L1 cache reference/hit 1.5 ns 4 cycles Floating-point add/mult/FMA operation 1.5 ns 4 cycles L2 cache reference/hit 5 ns 12 ~ 17 cycles Branch mispredict 6 ns 15 ~ 20 cycles L3 cache hit (unshared cache line) 16 ns 42 cycles L3 cache hit (shared line in another core) 25 ns 65 cycles Mutex lock/unlock 25 ns L3 cache hit (mod
