fpgacpu.org - FPGA CPU LinksFPGA CPUs by individuals Joseph H. Allen: TE16 Tim Böscke: 8 Bit CPU for a 32 macrocell CPLD Mike Butts: xr16vx, KIM-RC Dave Conroy's PDP-8/X (XCS10 with an XCS05 IOU) and PDP-4/X (XC4010E). Tom Coonan: RISC8 Synthesized PIC Brian Davis: YARD-1A (Yet Another RISC Design) (announcement) Rob Finch: Sparrow (announcement) Jan Gray (1996): J32 (Homebrewing RISC Microprocessors in FPGAs) Jeung Joon Lee
AO
Monpe's Room [Design : Verilog]
NiosII/SRAMにアクセス - PukiWiki
