LiteXではじめる自作SoC(1)
LiteX ではじめる自作SoC 最近は、RISC-V の誕生により、CPUコアは個人の趣味で作るのが難しくない時代になってきた。 さて、コンピュータというのは、CPUコアだけで動くものではなく、周辺のストレージ、ネットワーク、DRAM、USB、その他入出力装置が揃ってはじめて動くものだ。 CPUコアが個人で自由に作れるようになったら、その次のステップとして、周辺装置も含めた物体、つまり、SoC(System On Chip)を自分で作れるようになりたいと思うのは自然なことだろう。 LiteX は、そういうSoCを自分で作ってみたいという人向けのツール、RTLなどが集まったプロジェクトだ。 公式のWikiによると、 LiteX is a Python "front-end" that generates Verilog netlists, and drives proprietary bu
Renode
Renode is an open source software development framework with commercial support from Antmicro that lets you develop, debug and test multi-node device systems reliably, scalably and effectively. Renode strengths full determinism of execution, shared virtual time transparent & robust debugging, tracing, analysis, even in multi-node setups easy integration with your everyday tools, plugins rich model
lowRISC: Collaborative open silicon engineering
Open to the corelowRISC is a not-for-profit company with a full stack engineering team based in Cambridge, UK. We use collaborative engineering to develop and maintain open source silicon designs and tools. SafetyDetectives Interview With Gavin Ferris - CEO at lowRISCMay 10, 2024lowRISC’s CEO, Dr. Gavin Ferris, was recently interviewed by SafetyDetectives’ Shauli Zacks. The article is reproduced h
RocketBoards
Accelerate development by exchanging ideas with the Linux community. Discover the right resources for your embedded solutions. Community Design Initiative Learn about the Rocketboards community design initiative and how you can benefit … read more Why join RocketBoards.org Get your question answered, show off your latest SoC FPGA project , start your own wiki page, edit an existing wiki page are j
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GitHub - fusesoc/fusesoc-cores: FuseSoC standard core library
GitHub - enjoy-digital/litex: Build your hardware, easily!
GitHub - AleksandarKostovic/Riscy-SoC: Riscy-SoC is SoC based on RISC-V CPU core, designed in Verilog
GitHub - tommythorn/yari: YARI is a high performance open source FPGA soft-core RISC implementation, binary compatible with MIPS I. The distribution package includes a complete SoC, simulator, GDB stub, scripts, and various examples.
Redirecting Peripherals from MIO to EMIO | Zedboard
AMD Technical Information Portal
Oldland CPU
GitHub - olofk/fusesoc: Package manager and build abstraction tool for FPGA/ASIC development