Composable CPU descriptions in CλaSH, and wrap-up of RetroChallenge 2018/09 (30 September 2018)
30 September 2018 (programming haskell fpga electronics retrochallenge retro clash) My last post ended with some sample CλaSH code illustrating the spaghetti-ness you can get yourself into if you try to describe a CPU directly as a function (CPUState, CPUIn) -> (CPUState, CPUOut). I promised some ideas for improving that code. To start off gently, first of all we can give names to some common inte
依存型の紹介と応用としてのClashの紹介
目的 19番目の Advent Calender 2017 Haskell（その2）です。 依存型とは何か、何に役に立つのか、その応用としてのClashと Clashを用いた論理回路の実装のトライアルの紹介をします。 依存型とは何か Wikipediaの依存型のリンク先に他の型の値に依存する型が依存型とあります。例えば、Boolの値はTrue,Falseがありますが、Boolが型なのはもちろんですが、TrueやFalseも型として扱えるようになります。 その代表的なものとして、リストの要素数を埋め込んだ型があります。例えば、普通のBoolのリストは[Bool]な感じで長さに決まりはないですが、Vector 5 Boolのように長さ5のBool型のリストが作れます。(vector-sizedパッケージで実際に作れます。) 型に値を埋め込むだけだとありがたみがないですが、カリー＝ハワード同型対
Building a CPU With Haskell - Part 1 :: Will Yager
Blog Building a CPU with Haskell Part 1 October 2017 Today, we're going to build a simple CPU. We're going to write it in Haskell and use CLaSH to compile it to hardware. This entire webpage is a literate Haskell file. You can see it here on Github. To load the file into an interactive REPL, install CLaSH and run clashi CPU1.lhs. If you want to simulate the Verilog hardware code or put it on an FP
HaSKI :: Will Yager
Blog HaSKI An FPGA-based SKI calculus evaluator written in Haskell/Cλash HaSKI (github) is my attempt at building a reasonably simple hardware-based evaluator for the dead-simple, turing-complete SKI combinator calculus. Background: Circuit design Currently, the vast majority of hardware projects are written using a "Hardware Description Language", or HDL. These are text-based languages that allow
A transformation-based approach to hardware design using higher-order functions
A transformation-based approach to hardware design using higher-order functions The amount of resources available on reconfigurable logic devices like FPGAs has seen a tremendous growth over the last thirty years. During this period, the amount of programmable resources (CLBs and RAMs) has increased by more than three orders of magnitude. Programming these reconfigurable architectures has been dom
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GitHub - gergoerdi/clash-spaceinvaders: Intel 8080-based Space Invaders arcade machine implemented on an FPGA, written in CLaSH
Very high-level simulation of a CλaSH CPU (15 September 2018)
