masterqのブックマーク - はてなブックマーク

Overview :: AVR Core :: OpenCores
masterq 2018/01/28
avr

hdl

verilog

mcu

cpu
リンク
Overview :: Navré AVR clone (8-bit RISC) :: OpenCores
masterq 2016/11/14
avr

verilog

hdl

fpga
リンク
OpenCores
masterq 2013/04/29
OpenRISCがすぐ動くボードらしい

openrisc

hardware

fpga

altera
リンク
OpenCores
masterq 2013/02/13
一般的に使えるCPUをめざしてたのかな？

cpu

fpga

mmu
リンク
Overview :: UCore :: OpenCores
masterq 2013/02/13
"UCore is a RISC microprocessor compatible of the MIPS32R2 Instruction Set. It can run all the MIPS32R2 instructions except the branch likely instructions. For these instructions are not recommended in the specification. "

fpga

mips

mmu

cpu
リンク
Overview :: ZPU - the worlds smallest 32 bit CPU with GCC toolchain :: OpenCores
masterq 2013/02/13
"The ZPU is a small, portable CPU core with a GCC toolchain and eCos RTOS support. "

cpu

fpga
リンク
Overview :: Mips-FaultTolerant :: OpenCores
masterq 2013/02/13
"The mips – fault tolerant is mips 32 bits processor with error detection ( Fault Tolerant )."

mips

fpga

cpu
リンク
Overview :: miniMIPS :: OpenCores
masterq 2013/02/13
"The processor speed is 50MHz. As at each cycle an instruction ends (except when there are stalls), that means 50 million instructions per second. "

fpga

cpu
リンク
Overview :: JOP: a Java Optimized Processor :: OpenCores
masterq 2013/02/13
"JOP is the implementation of the Java Virtual Machine (JVM) as concrete machine in hardware. The design has been sucessfully implemented in low cost FPGA devices from Altera (ACEX 1K50, Cyclone) and Xilinx (Spartan II and Spartan-3). "

java

fpga

cpu
リンク
Overview :: HiCoVec - a configurable SIMD CPU :: OpenCores
masterq 2013/02/13
"The HiCoVec processor is based on a simple 32 bit scalar unit and connected with a vector unit for SIMD operations. "

cpu

simd

fpga
リンク
Overview :: FORTH processor with Java compiler :: OpenCores
masterq 2013/02/13
"A 32-bit FORTH processor conforming to the DPANS'94. This processor was developed as diploma thesis to obtain the academic degree Diplomingenieur (Master of Computer Science) at Johannes Kepler University in Linz, Austria. "

fpga

java

cpu
リンク
Overview :: Amber ARM-compatible core :: OpenCores
Category:Processor Language:Verilog Development status:Stable Additional info:Design done, FPGA proven, Specification done WishBone compliant: Yes WishBone version: n/a License: LGPL Description The Amber processor core is an ARM-compatible 32-bit RISC processor. The Amber core is fully compatible with the ARM® v2a instruction set architecture (ISA) and is therefore supported by the GNU toolset. T
masterq 2013/02/13
"an ARM-compatible 32-bit RISC processor. The Amber core is fully compatible with the ARM® v2a instruction set architecture (ISA) and is therefore supported by the GNU toolset."

arm

fpga

cpu
リンク
Overview :: Ion - MIPS(tm) compatible CPU :: OpenCores
masterq 2013/02/13
"This is a MIPS-I compatible CPU, aiming at compatibility with IDT’s R3000 MIPS derivative. "

cpu

mips

fpga
リンク
Overview :: Plasma - most MIPS I(TM) opcodes :: OpenCores
masterq 2011/05/06
GCC実装が付いてるのがうれしい

mips

fpga

cpu

gcc
リンク
Overview :: YACC-Yet Another CPU CPU :: OpenCores
masterq 2011/04/13
cpu

fpga
リンク
1

はてなブックマーク

タグ

ブックマーク / opencores.org (15)

お知らせ

今週のはてなブックマーク数ランキング（2024年9月第2週）

月間はてなブックマーク数ランキング（2024年8月）

今週のはてなブックマーク数ランキング（2024年9月第1週）

公式Twitter

キーボードショートカット一覧

はてなブックマーク

公式Twitter

はてなのサービス